Fujitsu MB96300 series Hardware Manual page 360

F2mc-16fx 16-bit
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CHAPTER 13 I/O PORTS
13.2.1
Port Data Register (PDRnn)
Note that R/W for I/O ports differ from R/W for memory in the following points:
• Input mode
Read: The level at the corresponding pin is read.
Write: Data is written to an output latch.
• Output mode
Read: The data register latch value is read.
Write: Data is written to an output latch and output to the corresponding pin.
■ Port Data Register
R/W: Readable and writeable
-
: Undefined
■ Reading the Port Data Register
Bits Px (PDR00 to PDRnn)
When a Port Data Register is read, the read value depends on the corresponding bit in the Data Direction
Register, on the current status of the resource that is connected to the same pin (if applicable) and the used
instruction (RMW or not RMW). The following cases are possible:
Table 13.2-1 Reading Port Data Register
DDR value
Resource
0 (input)
1 (output)
Reading PDR value with RMW instructions ensures, that single bits of PDR are not accidentally overwritten.
This may happen if resource function of pin is selected and pin value is read instead of PDR value.
Please refer to the following example for explanation of difference between reading PDR with RMW
instruction on F2MC-16LX and F2MC-16FX.
Bit #
352
Figure 13.2-2 Port Data Registers
7
6
5
P7
P6
P5
Pin value
output
enabled
value of resource output
disabled
port input
enabled
value of resource output
disabled
value of PDR
MB96300 Super Series Hardware Manual
4
3
2
1
0
P4
P3
P2
P1
P0
Read value of
'Read instructions'
input pin state
input pin state
value of PDR
value of PDR
7654.3210
PDRnn
Initial value
Access
Undefined
R/W
Read value of
'RMW instructions'
value of PDR
value of PDR
value of PDR
value of PDR

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