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CHAPTER 12 EXTERNAL BUS INTERFACE
corresponding DDR register to "output" and writing the required pin level to the PDR register.
The Hold state is left by setting the HRQ-pin back to '0'. Then the HAK-pin outputs high-level, and all other
output pins restore the values which they were driving before the Hold state.
■ Hold request during Standby-Mode
The Hold-Request is accepted in all Stand-by modes (Sleep, Timer and Stop mode). The hold request input
signal HRQ asynchronously forces the external bus pins to Hi-Z (input signal is not sampled with ECLK as
in Run mode for synchronous operation).
■ Watchdog timer
Note that the Hold function can stop the internal operation of the MCU if the CPU or DMA tries to access the
external bus. No software routine for clearing the Watchdog timer can be executed in this situation.
■ Timing diagram
Figure 12.3-13 shows the timing of the Hold function.
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MB96300 Super Series Hardware Manual
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