Fujitsu MB96300 series Hardware Manual page 362

CHAPTER 13 I/O PORTS
13.2.2 External Pin State Register (EPSRnn)
With this register the current state of the external pin can be read.
■ External Pin State Register
7
PS7
R : Readable
- : Undefined
■ Access to the external pin state data register
Bits PSx (EPSR00 to EPSRnn)
These bits mirror the status of the external port pin.
Writing to this register has no effect.
The external pin status register mirrors the status of the external port pin only if the corresponding bit in
the Port Input Enable Register is set to "1".
354
Figure 13.2-3 External Pin State Registers
6 5 4 3
PS6 PS5 PS4 PS3
MB96300 Super Series Hardware Manual
2 1 0 EPSRnn
PS2 PS1 PS0 Initial value
Undefined
Access
R