Fujitsu MB96300 series Hardware Manual page 972

APPENDIX
■ Effective address field
Table B.2-1 "Effective address field" lists the address formats specified by the effective address field.
Table B.2-1 Effective address field
Code
00
01
02
03
04
05
06
07
08
09
0A
0B
0C
0D
0E
0F
10
11
12
13
14
15
16
17
18
19
1A
1B
1C
1D
1E
1F
964
Representation
R0 RW0 RL0
R1 RW1 (RL0)
R2 RW2 RL1
R3 RW3 (RL1)
R4 RW4 RL2
R5 RW5 (RL2)
R6 RW6 RL3
R7 RW7 (RL3)
@RW0
@RW1
@RW2
@RW3
@RW0+
@RW1+
@RW2+
@RW3+
@RW0+disp8
@RW1+disp8
@RW2+disp8
@RW3+disp8
@RW4+disp8
@RW5+disp8
@RW6+disp8
@RW7+disp8
@RW0+disp16
@RW1+disp16
@RW2+disp16
@RW3+disp16
@RW0+RW7
@RW1+RW7
@PC+disp16
addr16
MB96300 Super Series Hardware Manual
Address format
Register direct: Individual parts correspond to
the byte, word, and long word types in order
from the left.
Register indirect
Register indirect with post increment
Register indirect with 8-bit displacement
Register indirect with 8-bit displacement
Register indirect with 16-bit displacement
Register indirect with index
Register indirect with index
PC indirect with 16-bit displacement
Direct address
Default bank
None
DTB
DTB
ADB
SPB
DTB
DTB
ADB
SPB
DTB
DTB
ADB
SPB
DTB
DTB
ADB
SPB
DTB
DTB
ADB
SPB
DTB
DTB
PCB
DTB