Fujitsu MB96300 series Hardware Manual page 977

MB96300 Super Series Hardware Manual
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I/O direct bit addressing (io:bp)
Specify bits in physical addresses 000000H to 0000FFH explicitly. Bit positions are indicated by ":bp",
where the larger number indicates the most significant bit (MSB) and the lower number indicates the least
significant bit (LSB).
SETB I:0C1H:
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Abbreviated direct bit addressing (dir:bp)
Specify the eight low-order bits of a memory address explicitly in an operand. Address bits 8 to 15 are
specified by the direct page register (DPR). Address bits 16 to 23 are specified by the data bank register
(DTB). Bit positions are indicated by ":bp", where the larger number indicates the most significant bit (MSB)
and the lower number indicates the least significant bit (LSB).
Figure B.3-9 Example of abbreviated direct bit addressing (dir:bp)
SETB S:10H:0
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Direct bit addressing (addr16:bp)
Specify arbitrary bits in 64 kilobytes explicitly. Address bits 16 to 23 are specified by the data bank register
(DTB). Bit positions are indicated by ":bp", where the larger number indicates the most significant bit (MSB)
and the lower number indicates the least significant bit (LSB).
SETB 2222H:0
Figure B.3-8 Example of I/O direct bit addressing (io:bp)
(This instruction sets bits by I/O direct bit addressing.)
Before execution
After execution
(This instruction sets bits by abbreviated direct bit addressing.)
Before execution
DTB 5 5
After execution
DTB 5 5
Figure B.3-10 Example of direct bit addressing (addr16:bp)
(This instruction sets bits by direct bit addressing.)
Before execution
DTB 5 5
After execution DTB 5 5
Memory space
0000C1H 0 0
0 1
0000C1H
DPR 6 6 556610H
DPR 6 6 556610H
552222H
552222H
APPENDIX B Instructions
Memory space
0 0
Memory space
0 1
Memory space
0 0
Memory space
0 1
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