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MB96300 Super Series Hardware Manual
14.3.3
16-bit Free-Running Timer Operation
The 16-bit Free-Running Timer starts counting from counter value "0000" after the reset
is released. The counter value is used as the base time for the 16-bit Output Compare
and 16-bit Input Capture operations.
■ 16-bit Free-Running Timer operation
The counter value is cleared in the following conditions:
•
When an overflow occurs.
• The compare clear register value matches the 16-bit Free-Running Timer value. (The mode must be set.)
•
When a match with the Output Compare register 0 or Output Compare register 4 occurs. (This depends on
the mode.)
•
When "1" is written to the CLR bit of the TCCSL register during operation.
•
When "0000" is written to the TCDT register during stop.
•
Reset
An interrupt can be generated when an overflow occurs or when the counter is cleared by a match with the
compare register 0 or 4. (Compare match interrupts can be used only in an appropriate mode.)
■ Clearing the counter by an overflow
Counter value
FFFF
H
BFFF
H
7FFF
H
3FFF
H
0000
H
Reset
Interrupt
Figure 14.3-5 Clearing the counter by an overflow
CHAPTER 14 16-BIT I/O TIMER
Overflow
Time
373
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