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MB96300 Super Series Hardware Manual
■ Peripheral resource relocation register 7 (PRRR7)
Figure 1.7-8 Peripheral resource relocation register 7 (PRRR7)
Address:
0004dd
H
X
: undefined value
R/W
: readable and writable
7
6
5
4
3
2
TX2_R RX2_R INT5_R1 INT4_R1 INT3_R1
CS3_R
NMI_R ADTG_R
R/W R/W R/W R/W R/W
R/W R/W R/W
1
0
Initial value
0 0 0 0 0 0 0 0
bit0
ADTG_R
A/D converter trigger input relocation bit
0
Pin ADTG is used as input pin
1
Pin ADTG_R is used as input pin
bit1
NMI_R
Non-Maskable Interrupt input relocation bit
0
Pin NMI is used as input pin
1
Pin NMI_R is used as input pin
bit2
CS3_R External bus interface Chip Select 3 output relocation bit
0
Pin CS3 is used as output pin
1
Pin CS3_R is used as output pin
bit3
INT3_R1
External interrupt 3 second input relocation bit
0
If bit INT3_R = 0, then pin INT3 is used as input pin
1
If bit INT3_R = 0, then pin INT3_R1 is used as input pin
bit4
INT4_R1
External interruot 4 second input relocation bit
0
If bit INT4_R = 0, then pin INT4 is used as input pin
1
If bit INT4_R = 0, then pin INT4_R1 is used as input pin
bit5
INT5_R1
External interrupt 5 second input relocation bit
0
If bit INT5_R = 0, then pin INT5 is used as input pin
1
If bit INT5_R = 0, then pin INT5_R1 is used as input pin
bit6
RX2_R
CAN 2 RX input relocation bit
0
Pin RX2 is used as input pin
1
Pin RX2_R is used as input pin
bit7
CAN 2 TX output relocation bit
TX2_R
0
Pin TX1 is used as output pin
1
Pin TX1_R is used as output pin
CHAPTER 1 OVERVIEW
B
39
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