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CHAPTER 1 OVERVIEW
■ Peripheral resource relocation register 2 (PRRR2)
Figure 1.7-3 Peripheral resource relocation register 2 (PRRR2)
Address:
0004d8
H
X
: undefined value
R/W
: readable and writable
34
7
6
5
4
3
2
PPG7_R PPG6_R PPG5_R PPG4_R PPG3_R
PPG2_R PPG1_R PPG0_R
R/W R/W R/W R/W R/W
R/W R/W R/W
MB96300 Super Series Hardware Manual
1
0
Initial value
0 0 0 0 0 0 0 0
bit0
PPG0_R
PPG 0 output relocation bit
0
Pin PPG0 is used as output pin
1
Pin PPG0_R is used as output pin
bit1
PPG1_R
PPG 1 output relocation bit
0
Pin PPG1 is used as output pin
1
Pin PPG1_R is used as output pin
bit2
PPG2_R
PPG 2 output relocation bit
0
Pin PPG2 is used as output pin
1
Pin PPG2_R is used as output pin
bit3
PPG3_R
PPG 3 output relocation bit
0
Pin PPG3 is used as output pin
1
Pin PPG3_R is used as output pin
bit4
PPG4_R
PPG 4 output relocation bit
0
Pin PPG4 is used as output pin
1
Pin PPG4_R is used as output pin
bit5
PPG5_R
PPG 5 output relocation bit
0
Pin PPG5 is used as output pin
1
Pin PPG5_R is used as output pin
bit6
PPG6_R
PPG 6 output relocation bit
0
Pin PPG6 is used as output pin
1
Pin PPG6_R is used as output pin
bit7
PPG7_R
PPG 7 output relocation bit
0
Pin PPG7 is used as output pin
1
Pin PPG7_R is used as output pin
B
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