Fujitsu MB96300 series Hardware Manual page 806

CHAPTER 30 USB Mini-host
30.5.2 USB Bus Reset
Description of the USB Bus reset operation.
■ USB Bus Reset
When the HCNT0:URST bit is set to "1" in the host mode, it sends out SE0 for not less than 10 ms
and resets the USB bus. When the USB bus has been reset, it resets the URST bit and generates,
if enabled (cf 31.4.1), an interrupt when HIRQ:URIRQ bit is set. Clearing this bit clears the
interrupt.
■ Requirements before and after the USB Bus reset
Important observation when dealing with the USB Bus reset:
1. Before the USB bus is reset, HSTATE:CSTAT bit must be checked to confirm the presence of
a device.
2. When the USB bus is being reset, the HSTATE:CSTAT bit is reset and the USB device state is
considered disconnected. However the HIRQ:DIRQ bit remains equal to "0".
3. After the USB bus is reset, HSTATE:CLKSEL bit must be updated to match the TMODE bit of
the same register. The CLKSEL bit can only be updated when the UDCC:RST bit is set (cf
31.4.4).
Terminal D+ for Mini-HOST
Terminal D- for Mini-HOST
URST bit of HCNT
CSTAT bit of HSTATE
URIRQ bit of HIRQ
(HCNT URIRE="1")
798
Figure 30.5-2 Reset Timing Example to Device
Write "1" to HCNT URST bit
10µs
2.5µs