Fujitsu MB96300 series Hardware Manual page 166

CHAPTER 6 CLOCKS
Table 6.2-3 Function Description of Each Bit of the Clock Stabilization Select Register (CKSSR) (1/2)
Bit name
bit 0 - MCST0 to MCST2:
bit 2 Main Clock
Stabilization Time
select bits
bit 3 - SCST0 to SCST1:
bit 4 Sub Clock
Stabilization Time
select bits
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• These bits select the stabilization time for the Main oscillation circuit according to the
following table:
bit2 bit1 bit0
MCST2 MCST1 MCST0
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
• Any reset initializes these bits to "111".
• These bits define after how many Main clock (CLKMC) cycles the Main Clock
Monitor (MCM) bit will be set, allowing to use the Main clock as System clock.
Note:
The oscillation stabilization wait interval must be set to a value appropriate for the
oscillator used.
The initialization of these bits to "111" clears the CKMR:MCM bit in case the reset
18
was asserted within 2
• These bits select the stabilization time for the Sub oscillation circuit according to the
following table:
bit4 bit3
SCST1 SCST0
clock of 32.768kHz is given in parentheses)
12
0 0 2 / CLKSC (125ms)
14
0 1 2 / CLKSC (0.5s)
15
1 0 2 / CLKSC (1s)
16
1 1 2 / CLKSC (2s)
• Any reset initializes these bits to "11".
• These bits define after how many Sub clock (CLKSC) cycles the Sub Clock Monitor
(SCM) bit will be set, allowing to use the Sub clock as System clock.
Note:
The oscillation stabilization wait interval must be set to a value appropriate for the
oscillator used.
The initialization of these bits to "11" clears the CKMR:SCM bit in case the reset
16
was asserted within 2
Function
Main Clock Stabilization Time
(The corresponding time for a Main
clock of 4MHz is given in parentheses)
10
2 / CLKMC (approx. 256µs)
12
2 / CLKMC (approx. 1ms)
13
2 / CLKMC (approx. 2ms)
14
2 / CLKMC (approx. 4ms)
15
2 / CLKMC (approx. 8ms)
16
2 / CLKMC (approx. 16ms)
17
2 / CLKMC (approx. 32ms)
18
2 / CLKMC (approx. 65ms)
CLKMC cycles after activation of the Main oscillator.
Sub Clock Stabilization Time
(The corresponding time for a Sub
CLKSC cycles after activation of the Sub oscillator.