Fujitsu MB96300 series Hardware Manual page 377

F2mc-16fx 16-bit
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MB96300 Super Series Hardware Manual
14.3.1
Data Register (TCDTn)
The Data Register (TCDTn) can read the count value of the 16-bit Free-Running Timer.
The counter value is cleared to "0000" upon a reset. The timer value can be set by writing
a value to this register. However, ensure that the value is written while the operation is
stopped (STOP=1).
The data register must be accessed by the word access instructions.
■ Data register of Free-Running Timer (TCDTn)
15
R/W R/W R/W R/W R/W
R/W
:
Readable and writable
The 16-bit Free-Running Timer is initialized upon the following factors:
Reset
Clear bit (CLR) of control status register
A match between compare register and the timer counter value.
Figure 14.3-2 Data register of Free-Running Timer (TCDTn)
14
13
12
11
10
9
R/W
R/W R/W
8
7
6
5
4
3
2
R/W R/W R/W R/W R/W
R/W
R/W R/W
CHAPTER 14 16-BIT I/O TIMER
1
0
TCDTn
Initial value
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
B
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