Fujitsu MB96300 series Hardware Manual page 629

F2mc-16fx 16-bit
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MB96300 Super Series Hardware Manual
Figure 22.9-1 Data Transfer between IFx Registers and Message RAM
After the partial write of a Message Object, the Message Buffer Registers that are not selected in the
Command Mask Register will be set to the actual contents of the selected Message Object.
After the partial read of a Message Object, the Message Buffer Registers that are not selected in the
Command Mask Register will be left unchanged.
■ Transmission of Messages
If the shift register of the CAN Core cell is ready for loading and if there is no data transfer between the IFx
Registers and Message RAM, the MSGVAL bits in the Message Valid Register and the TXRQST bits in the
Transmission Request Register are evaluated. The valid Message Object with the highest priority pending
transmission request is loaded into the shift register by the Message Handler and the transmission is started.
The Message Object's NEWDAT bit is reset.
After a successful transmission and if no new data was written to the Message Object (NEWDAT = '0')
since the start of the transmission, the TXRQST bit will be reset. If TXIE is set, INTPND will be set after a
successful transmission. If the CAN has lost the arbitration or if an error occurred during the transmission,
the message will be retransmitted as soon as the CAN bus is free again. If meanwhile the transmission of a
message with higher priority has been requested, the messages will be transmitted in the order of their
priority.
■ Acceptance Filtering of Received Messages
When the arbitration and control field (Identifier + IDE + RTR + DLC) of an incoming message is
completely shifted into the Rx/Tx Shift Register of the CAN Core, the Message Handler FSM starts the
CHAPTER 22 CAN CONTROLLER
621

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