Pin Status In Different Mcu States - Fujitsu MB96300 series Hardware Manual

CHAPTER 12 EXTERNAL BUS INTERFACE
12.6

Pin status in different MCU states

This chapter describes the status of the external bus pins in the following MCU states:
- Reset
- Run mode with external bus access
- Run mode with internal access
- Standby modes
- Hold state
■ Status of external bus pins
The following table describes the status of each external bus pin in different MCU states. The statements are
valid only if the external bus is enabled. See Table 12.4-1 "Recommended state of external bus pins" for
details about pin usage in external bus modes. To ensure Hi-Z state of the external bus pins, follow the
recommendation of Chapter 12.4 "Notes on using the external bus".
Table 12.6-1 Status of each pin of the external bus
Pin name
AD[07:00]
AD[15:08]
A[07:00]
A[15:08]
A[23:16]
ALE/AS
RD
WRL/WR
WRH
UB/LB
CS[5:0]
ECLK
RDY
HRQ
HAK
*1 Standby modes are: Sleep-, Timer- and Stop mode; the external bus is not in Hold state
Notes about ECLK
When no external bus access is performed, the state of ECLK depends on the setting of EBCF:DIV[2:0],
CKI and CSM bits. If the MCU is set to a Standby mode, the clock supplying the external bus interface is
stopped and therefore the external bus clock ECLK is stopped too. Hence the state of ECLK in Standby
mode depends on the ECLK state at the transition to Standby mode. If the Clock suspend mode is
disabled or the ECLK clock divider is disabled (EBCF:DIV[2:0]="000"), this state may be 'H' or 'L'. If
346
Reset Run mode
external bus access
used for data and/or
address
can be used for data and/
or address (depending on
bus mode)
output if enabled (non
multiplexed bus mode
only)
Input dis-
abled
/ output
Hi-Z
output if enabled
input if enabled
MB96300 Super Series Hardware Manual
Standby mode +
SMCR:SPL='0'
internal access
output Hi-Z
output Hi-Z if used for external bus
output Hi-Z (non multiplexed bus mode only)
output Hi-Z
output inactive level if enabled
output 'H' if enabled
output inactive level if enabled
output 'H' or 'L' if enabled
output if enabled
(inactive level for
(state and activity
EBCF:CSM='1' and
depends on clock
configuration)
DIV[2:0
unused input
input if enabled
'H' output if enabled
external bus
*1 Hold state
output Hi-Z
EBCF:CSM='0' and
CKE='1': active clock.
] Otherwise Hi-Z
≠"000")
input
'L' output