Fujitsu MB96300 series Hardware Manual page 983

F2mc-16fx 16-bit
Hide thumbs Also See for MB96300 series:
Table of Contents

Advertisement

MB96300 Super Series Hardware Manual
POPW RW0, RW4
Accumulator indirect addressing (@A)
Memory is accessed using the address indicated by the contents of the low-order bytes (16 bits) of the
accumulator (AL). Address bits 16 to 23 are specified by a mnemonic in the data bank register (DTB).
Figure B.4-10 Example of accumulator indirect addressing (@A)
MOVW A, @A
Figure B.4-9 Example of register list (rlist)
(This instruction transfers memory data indicated by the SP to multiple
word registers indicated by the register list.)
SP
3 4 F A
RW0
RW1
RW2
RW3
RW4
RW5
RW6
RW7
Memory space
34FEH
0 4
34FDH
0 3
34FCH
0 2
34FBH
SP
0 1
34FAH
Before execution
(This instruction reads data by accumulator indirect addressing and stores it in A.)
Before execution
A
0 7 1 6
DTB
B B
After execution
A
0 7 1 6
DTB
B B
SP
3 4 F E
RW0
0 2
0 1
RW1
RW2
RW3
RW4
0 4
0 3
RW5
RW6
RW7
Memory space
SP
34FEH
0 4
34FDH
0 3
34FCH
0 2
34FBH
0 1
34FAH
After execution
2 5 3 4
Memory space
BB2535H
F F
BB2534H
E E
F F E E
APPENDIX B Instructions
975

Advertisement

Table of Contents
loading

Table of Contents