6.2.2
Clock Monitor Register (CKMR)
The Clock Monitor Register (CKMR) is used to check the current status of the System
clocks (Clock mode) and the status of the oscillation circuits.
■ Configuration of the Clock Monitor Register (CKMR)
Figure 6.2-3 shows the configuration of the Clock Monitor Register (CKMR) and Table 6.2-2 describes the
function of each bit.
Figure 6.2-3 Configuration of the Clock Monitor Register (CKMR)
15
Address:
000403
SCM
H
R
R
: Read only (writing is ignored)
X
: undefined value
14
13
12
11
10
9
SC2M0 SC1M1 SC1M0
PCM
MCM
RCM SC2M1
R
R
R
R
R
R
8
Initial value
X X X X X X X X
R
bit9
bit8
SC1M1
SC1M0
0
0
CLKS1 is set to CLKRC (RC clock)
0
1
CLKS1 is set to CLKMC (Main clock)
1
0
CLKS1 is set to CLKPLL/CLKMOD (PLL clock)
1
1
CLKS1 is set to CLKSC (Sub clock)
bit11
bit10
SC2M1
SC2M0
0
0
CLKS2 is set to CLKRC (RC clock)
0
1
CLKS2 is set to CLKMC (Main clock)
1
0
CLKS2 is set to CLKPLL (unmodul. PLL clock)
1
1
CLKS2 is set to CLKSC (Sub clock)
bit12
RCM
0
RC oscillator is not ready
1
RC oscillator is ready
bit13
MCM
Main Clock Monitor bit
0
Main oscillator is not ready
1
Main oscillator is ready
bit14
PCM
PLL Clock Monitor bit
0
PLL not is ready
1
PLL is ready
bit15
SCM
Sub Clock Monitor bit
0
Sub oscillator is not ready
1
Sub oscillator is ready
CHAPTER 6 CLOCKS
B
System Clock 1 Monitor bits
System Clock 2 Monitor bits
RC Clock Monitor bit
153