Fujitsu MB96300 series Hardware Manual page 240

CHAPTER 9 STANDBY MODE AND VOLTAGE REGULATOR CONTROL CIRCUIT
selector.
The status of the PLL multiplier circuit, the RC and Sub oscillator depend on the setting of the PCE, RCE
and SCE bits when they are not used as System clock 2.
●
PLL Sleep mode
The PLL Sleep mode is activated to stop the CLKB clock in the PLL clock mode. Resources connected to the
Peripheral clock 1 operate on the PLL clock.
Resources connected to the Peripheral clock 2 are operating with the clock selected by the System clock 2
selector.
The status of the RC and Sub oscillator depend on the setting of the RCE and SCE bits when they are not
used as System clock 2.
●
Sub Sleep mode
The Sub Sleep mode is activated to stop the CLKB clock in the Sub clock mode. Resources connected to the
Peripheral clock 1 operate on the Sub clock.
Resources connected to the Peripheral clock 2 are operating with the clock selected by the System clock 2
selector.
The status of the Main oscillator, the PLL multiplier circuit and the RC oscillator depend on the setting of the
MCE, PCE and RCE bits when they are not used as System clock 2.
■ Timer Mode
In this mode, the standby control circuit stops supplying the System clocks CLKS1 and CLKS2 what further
reduces power consumption by stopping the Bus clock and also all Peripheral clocks. This stops all functions,
excluding oscillators, the PLL and the corresponding source clock timers.
●
RC Timer mode
In RC Timer mode, the RC oscillator and RC clock timer is always active. The status of the PLL, the Main
and Sub oscillator and corresponding source clock timers however depend on the setting of the PCE, MCE
and SCE bits.
●
Main Timer mode
In Main Timer mode, the Main oscillator and Main clock timer is always active. The status of the PLL, the
RC and Sub oscillator and corresponding source clock timers however depend on the setting of the PCE,
RCE and SCE bits.
●
PLL Timer mode
In PLL Timer mode, the Main oscillator, the PLL and the Main clock timer is always active. The status of the
RC and Sub oscillator and corresponding source clock timers however depend on the setting of the RCE and
SCE bits.
●
Sub Timer mode
In Sub Timer mode, the Sub oscillator and Sub clock timer is always active. The status of the PLL, the Main
and RC oscillator and corresponding source clock timers however depend on the setting of the PCE, MCE
and RCE bits.
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MB96300 Super Series