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CHAPTER 19 ALARM COMPARATOR
19.2
Alarm Comparator Registers
The Alarm Comparator has the following two registers:
• Alarm Comparator Control/Status register (ACSRn)
• Alarm Comparator Extended Control/Status register (AECSRn)
■ Alarm Comparator Control/Status register (ACSRn)
Figure 19.2-1 Structure of Alarm Comparator control/status register
CMD
R/W
Note:
• The suffix 'n' denotes the number of the Alarm Comparator module.
Bit 7: CMD (Comparison Mode)
0
1
Bit 6: OVEN (Overvoltage Enable)
0
1
Bit 5: UVEN (Undervoltage Enable)
0
1
Bit 4: OUT2 (Synchronized output of Alarm Comparator UV output)
460
Bits
7
6
5
4
OVEN
UVEN
OUT2
R/W
R/W
R
Slow comparison mode (less power consumption). [Initial value]
Fast comparison mode (higher power consumption).
See Datasheet for Power consumption and comparison time of the Alarm Comparator.
No interrupt in case of overvoltage
Interrupt enabled in case of overvoltage [Initial value]
No interrupt in case of undervoltage
Interrupt enabled in case of undervoltage [Initial value]
MB96300 Super Series Hardware Manual
3
2
1
0
OUT1
IRQ
IEN
PD
R
R/W0 R/W
R/W
ACSRn
Initial value
011XXX00
B
Access
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