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CHAPTER 14 16-BIT I/O TIMER
Counter value
FFFF
H
BFFF
H
7FFF
H
3FFF
H
0000
H
Reset
IN0
IN1
IN example
Capture 0
Capture 1
Capture
example
Capture 0
interrupt
Capture 1
interrupt
Capture example
interrupt
■ Input Capture input timing
●
Capture timing for input signals
φ
Counter value
Input capture
input
Capture signal
Capture register
Interrupt
394
Figure 14.5-5 Example of Input Capture fetch timing
Undefined
3FFF
H
Undefined
Undefined
Figure 14.5-6 Capture timing for input signals
N
MB96300 Super Series Hardware Manual
BFFF
3FFF
H
H
N+1
Valid edge
Time
7FFF
H
N+1
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