Fujitsu MB96300 series Hardware Manual page 224

CHAPTER 8 RESETS AND STARTUP
Table 8.5-2 Function Description of the Bits of the Reset Cause and Clock Status Register (RCCSR) (2/2)
Bit name
bit 14 MCMF:
Main Clock
Missing Flag
bit 15 SCMF:
Sub Clock
Missing Flag
■ Notes about reset cause bits
●
Multiple reset causes before reading reset cause register
When multiple reset causes are generated before the reset cause register is read out, the corresponding reset
cause bits of the RCCSR/RCCSRC register are all set to "1". If, for example, an External reset request via the
RST pin and the Watchdog timer reset occur at the same time, the ERST and the WRST bits are both set to
"1". The following table show this correspondence.
Table 8.5-3 Correspondence between reset cause bits and reset causes
Reset cause
Power reset (Power-on or low
voltage)
External reset request via RST
pin
Main clock stop detection
reset
Sub clock stop detection reset
Software reset request
Watchdog timer overflow
*: Previous state maintained
X: Undefined
●
Power reset
For PRST = '1', the software should be programmed so that it will ignore all other reset cause bits.
●
Clearing the reset cause bits
The reset cause bits are cleared only when reading the Reset Cause and Clock Status Register RCCSRC at
216
• This bit indicates if a missing Main clock was detected.
• After a Power reset, this bit is not initialized.
• This bit is set to "1" if the Main oscillator is enabled and no rising edge of the Main
clock input signal (CLKMC) was observed within the interval time defined by the RCR:
MCSDI bit.
• This bit is cleared by a read access to RCCSRC at address 00040B
• This bit indicates if a missing Sub clock was detected.
• After a Power reset, this bit is not initialized.
• This bit is set to "1" if the Sub oscillator is enabled and no rising edge of the Sub clock
input signal (CLKSC) was observed within the interval time defined by the RCR:
SCSDI bit.
• This bit is cleared by a read access to RCCSRC at address 00040B
PRST
1
*
*
*
*
*
MB96300 Super Series Hardware Manual
Function
ERST MCRST SCRST
1 X X
1 * *
* 1 *
* * 1
* * *
* * *
.
H
.
H
SRST WRST
X X
* *
* *
* *
1 *
* 1