Fujitsu MB96300 series Hardware Manual page 767

F2mc-16fx 16-bit

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after the DRQO is set, this routine checks that the number of received data is 0, and clears the interrupt

cause DRQO and returns to continue with the preparation of the next setup stage.

■ Write Command USB function operation

For GetDescripter and the class vendor command

Set up operation

When the setup stage request is received, the DRQO flag is set. This triggers a CPU interrupt and set the

SETP flag confirming that the request is a setup packet. Then as many commands as necessary in the

receive buffer are read (which does not mean all eight bytes need to be read) and decoded, and necessary

setting tasks. DRQI (the interrupt cause DRQI due to the initial value of "1") is cleared without writing data

to the transmission buffer to prepare for a 0-byte response in the status stage, and the DRQIIE is set after

the status stage is complete successfully. The routine also clears the SETP flag and the DRQO interrupt

Data stage operation

The DRQO is set when the data stage toward OUT is complete. It enters a CPU interrupt process when the

DRQO is set, and first, confirms SIZE of the EP0 status register, and then activates DMA as many times as

required for the received number of pieces of data or reads data from the receive buffer via CPU read.

Then, it clears the DRQO interrupt cause before returning from the interrupt to the interrupted point.

Command completion operation

When the status stage is detected, a CPU interrupt is triggered and a routine is executed. Then, once the

status stage is complete, the DRQI is set. The DRQIIE interrupt enable is cleared before returning from the

interrupt routine.

Figure 29.4-7 Write Command USB function operation

Setup processing

Next processing for

CHAPTER 29 USB FUNCTION

Status stage