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CHAPTER 20 USART
■ Serial mode register (SMRn)
Figure 20.4-3 Configuration of the serial mode register (SMRn)
R/W
:
Readable and writable
W
:
Write only
:
Initial value
n = 0...9 according to device ( Please refer to
the datasheet of the corresponding device)
Table 20.4-2 Bit function of the serial mode register (SMRn)
Bit name
bit7
MD1 and MD0:
bit6
Operation mode
selection bits
480
7
6
5
4
3
2
1
R/W R/W R/W R/W
W
W
R/W R/W
These two bits sets the USART operation mode.
Note:
Changing the mode bit MD1, MD0 causes any ongoing reception or transmission to
be aborted.
MB96300 Super Series Hardware Manual
0
SMRn
Initial value
0 0 0 0 0 0 0 0
B
bit0
SOE
Serial data output enable bit of LIN-USART
0
LIN-UART serial data output pin disabled
1
LIN-UART serial data output pin enabled
bit1
SCKE
Serial clock output enable bit of LIN-USART
0
Serial clock output pin of LIN-USART disabled
or LIN-USART clock input pin
1
Serial clock output pin of LIN-USART enabled
bit2
LIN-USART programmable clear (Software Reset)
UPCL
write
0
ignored
1
Reset USART
bit3
Restart dedicated Reload Counter
REST
write
0
ignored
1
Restart Counter
bit4
EXT
External Serial Clock Source enable
0
Use internal Baud Rate Generator (Reload Counter)
1
Use external Serial Clock Source
bit5
OTO
One-to-one external clock Input enable
0
Use ext. Clock with Baud Rate Generator (Reload C.)
1
Use external Clock as is
bit6
bit7
MD0
MD1
0
0
Mode 0: Asynchronous normal
1
0
Mode 1: Asynchronous Multiprocessor
0
1
Mode 2: Synchronous
1
1
Mode 3: Asynchronous LIN
Function
read
always 0
read
always 0
Operation Mode Setting
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