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■ EP1 to EP5 Control Register (EP1C to EP5C)
7
6
PKS1
PKS1
R/W
R/W
15
14
EPEN
TYPE
R/W
R/W
X
: undefined value
R/W
: Readable and writable
: Initial value
Figure 29.3-3 EP1 Control Register (EP1C)
5
4
3
2
1
PKS1
PKS1
PKS1
PKS1
PKS1
R/W
R/W
R/W
R/W
R/W
13
12
11
10
9
TYPE
DIR
DMAE
NULE
STAL
R/W
R/W
R/W
R/W
R/W
0
Initial Value:
00000000
PKS1
B
R/W
bit0 to 6
PKS1
00
0
Initial value
H
value
Packet size value
8
Initial Value:
01100001
PSK1
B
R/W
bit8
PKS1
0
0
initial value
1
Packet size value
bit9
STAL
0
0
STALL clear
1
STALL set
bit10
NULE
NULL automatic transfer enable bit
0
0
NULL automatic transfer mode disable
1
NULL automatic transfer mode enable
bit11
DMAE
DMA automatic transfer enable bit
0
DMA automatic transfer disabled
1
DMA automatic transfer enabled
bit12
DIR
Endpoint direction selection bit
0
Outcoming direction
1
Incoming direction
bit13 to 14
TYPE
Endpoint transfer type bit
00
Prohibited
01
Isochronous transfer
10
Bulk transfer
11
Interrupt transfer
bit15
EPEN
0
0
End Point is desabled
1
End Point is enabled
CHAPTER 29 USB FUNCTION
PKS1 bits
Packet Size set bit
STALL set bit
Endpoint Enable bit
733
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