Software Interrupts - Fujitsu F2MC-16LX Hardware Manual

CHAPTER 3 INTERRUPTS
3.5

Software Interrupts

Software interrupts transfer the control from the execution of the program that is
currently executed by the CPU to a program for interrupt processing that was defined
by the user for this specific instruction.
■ Overview of Software Interrupts
A software interrupt occurs when a software interrupt instruction is executed.
performs one of the following types of processing when a software interrupt occurs:
• Saving data of the PC, PS, AH, AL, PCB, DTB, ADB, and DPR registers in the CPU to the
system stack.
• Setting the I flag of the PS register. This automatically prohibits further interrupts.
• Determining the value of the corresponding interrupt vector and branching the control to a
processing according to the value.
A software interrupt request issued by an INT instruction does not include an interrupt request
flag or permission flag. Software interrupt requests are always issued due to the execution of
an INT instruction.
The INT instruction does not include an interrupt level. Therefore, the INT instruction does not
update the ILM. The INT instruction clears the I flag and puts subsequent interrupt requests on
hold.
■ Structure of Software Interrupts
All software interrupts are processed by the CPU.
❍ CPU
Microcode: Interrupt processing step
If a software interrupt is issued, it is necessary to execute the corresponding instruction.
As shown in Table 3.3-1, software interrupts share the interrupt vector area with hardware
interrupts. For example, interrupt request number INT 13 is used at the same time by external
interrupt #0 from a hardware interrupt and INT #13 from a software interrupt.
external interrupt #0 and INT #13 call the same interrupt processing routine.
■ Operation of Software Interrupts
Execution of the microcode for software interrupt processing is started when the CPU loads and
executes a software interrupt instruction.
saves 12 bytes (PS, PC, PCB, DTB, ADB, DPR, and A) to the memory area indicated by SSB
and SSP. Three bytes from the interrupt vector are then stored to PC and PCB according to the
microcode. The I flag is reset (set to "0") and the S flag is set to "1". Consequently, the
interrupt processing program defined by the user application program is executed next.
66
The microcode for software interrupt processing
The CPU
Therefore,