Multiple Interrupts - Fujitsu MB90895 Series Hardware Manual

3.5.8

Multiple interrupts

Multiple hardware interrupts can be generated by setting different interrupt levels in the
interrupt level setting bits of the interrupt control register (ICR: ILO to IL2) in response
to multiple interrupt requests from the resource. However, multiple EI
started.
I Multiple interrupts
G
Multiple Interrupts
If an interrupt request with a higher priority than the interrupt level of the current interrupt processing is
generated during interrupt processing, the current interrupt processing is suspended to accept the generated
higher-level interrupt request. When the higher-level interrupt processing is terminated, the suspended
interrupt processing is resumed.
The interrupt level (IL) can be set to 0 to 7. The interrupt request set to level 7 is never accepted.
If an interrupt request with a priority equal to or lower than the interrupt level of the current-executing
interrupt is generated during interrupt processing, unless the setting of the interrupt enable flag (CCR: I) or
the interrupt level mask register (ILM)
Starting of multiple interrupts generated during interrupt processing can be disabled temporarily by setting
the interrupt enable flag (CCR: I) to disabled (CCR: I= 0) or the interrupt level mask register (ILM) to
disabled (ILM = 000).
Note:
Multiple EI
other EI
2
OS cannot be started. During EI
2
OS requests are all put on hold.
2
OS processing, other interrupt requests and
CHAPTER 3 CPU
2
OS cannot be
75