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CHAPTER 14 16-BIT I/O TIMER
■ Output Compare Control Status Register (OCS(2n+1))
Figure 14.4-4 Output Compare Control Status Register (OCS(2n+1))
15
CMOD1
R/W
R/W
:
Readable and writable
X
:
Undefined value
-
:
Undefined
:
Initial value
Table 14.4-2 Output Compare Control Status Register (OCS(2n+1)) (1/2)
Bit name
bit 15 and 12
CMOD0,
CMOD1
bit 14, 13
Undefined
bit 11
OTE(2n+1)
bit 10
OTE(2n+0)
380
14
13
12
11
10
9
CMOD0 OTE
-
OTE
OTD
-
-
R/W R/W
R/W
R/W R/W
These bits define the operation mode for the pin output signals. Depending on the
defined mode, the level is toggled upon a match with different compare registers. See
Table 14.4-3 "Function of CMOD1 and 0 bits" and Section 14.4.3 "16-bit Output
Compare Operation".
• Always write "0" to these bits
• The read value is undefined
• Read-modify-write is not affected.
These bits are used to enable the Output Compare Unit output pins. The initial value for
these bits is "0".
• "0": Output Compare Unit output is disabled. The corresponding pin can be used as
general-purpose port or for other peripheral function.
• "1": Output Compare Unit output is enabled.
MB96300 Super Series Hardware Manual
OCS(2n+1)
8
OTD
Initial value
0 X X 0 0 0 0 0
B
bit 8
OTD(2n+0)
Output Pin Level Select for channel (2n)
0
Sets "0" for compare pin output for unit (2n)
1
Sets"1" for compare pin output for unit (2n)
bit 9
OTD(2n+1)
Output Pin Level Select for channel (2n+1)
0
Sets "0" for compare pin output for unit (2n+1)
1
Sets"1" for compare pin output for unit (2n+1)
bit 10
OTE(2n+0)
Outpt Pin Enable for channel (2n)
0
Output Compare Unit output is disabled
1
Output Compare Unit output is enabled
bit11
OTE(2n+1)
Output Pin Enable for channel (2n+1)
0
Output Compare Unit output is disabled
1
Output Compare Unit output is enabled
bit 15
bit 12
CMOD1
CMOD0
Define Comparison mode for Pin
0
0
see description for details
Function
n = 0, 1, 2, 3, ...
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