Fujitsu MB96300 series Hardware Manual page 800

F2mc-16fx 16-bit
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CHAPTER 30 USB Mini-host
30.4.9
FRAME Setting Register (HFRAME)
The FRAME setting register (HFRAME) holds the FRAME Number when handling SOF
tokens.
■ FRAME Setting Register (HFRAME)
Figure 30.4-10 Bit Configuration of FRAME Setting Register (HFRAME)
7
6
5
FRAME0 FRAME0 FRAME0 FRAME0 FRAME0 FRAME0 FRAME0 FRAME0
R/W
R/W
R/W
15
14
13
Reserved Reserved Reserved Reserved Reserved FRAME1 FRAME1 FRAME1
-
-
R/W
X
: undefined value
R/W
: Readable and writable
: Initial value
Bit15-11
Bit10-0
When the HTOKEN:TKNEN bits to SOF activation is set, the SOF timer starts and, afterwards, an
SOF is automatically sent out every 1 ms. The FRAME setting register is automatically
incremented by 1 every time a SOF is completed.
792
4
3
2
1
R/W
R/W
R/W
R/W
12
11
10
9
R/W
R/W
R/W
R/W
Bit names
Reserved
• Do not use
HFRAME
• Those bits hold the frame number.
• Before setting the HTOKEN:TKNEN bits to SOF, the
• The UDCC:RST bit must be set to "0" to enable the
Initial Value:
0
00000000
B
R/W
bit0 to 7
HFRAME
Initial Value:
8
xx000000
B
R/W
bit8 to 13
HFRAME
bit14 to 15
Reserved
0
Always write "0" to this bit
Frame Number must be set. Furthermore, when the
HSTATE:SOFBUSY bit is "1" and an SOF token is being
executed, the write operation is inhibited.
register update
Frame Number Register
Frame Number Register
Reserved
Function

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