Fujitsu MB96300 series Hardware Manual page 753

■ EP0O Status Register (EP0OS)
7 6
Reserved SIZE
- R
15 14
BIFNI DRQOE
R/W R/W
- : irrelevant
X : undefined value
R/W : Readable and writable
: Initial value
The function of each bit in the EP0O status register (EP0OS) is described in the following.
Figure 29.3-9 EP0O Status Register (EP0OS)
5 4 3 2 1
SIZE SIZE SIZE SIZE SIZE
R R R R R
13 12 11 10 9
SPKIE Undef Undef DRQ0 SPK
R/W - - R/W R/W
0
Initial Value:
0xxxxxxx
SIZE
B
BIFNI Reset:
R
0xxxxxxx
B
bit0 to 6
SIZE
00 0 Initial value
H
value Packet size value
bit7
Reserved
0 Always write "0" to this bit
Initial Value:
8
100xx000
B
Reserved
BIFNI Reset:
1--xx000
B
-
bit8
Reserved
0 Always write "0" to this bit
bit9
SPK
0 0 Maximum possible data received
1 Maximum possible data received not reached
bit10
DRQ0
0 0 Received data interrupt clear
1 Received data successfull
bit11 & 12
Undef
X Always write "0" to this bit
bit13
SPKIE Short packet interrupt enable bit
0 Short packet status flag disable
1 Short packet status flag enable
bit14
DRQOIE Receive Data Interrupt enable bit
Reception Data flag disabled
0
1 Reception Data flag enabled
bit15
BFINI Transmission buffer initialization bit
0 0 Cancel initialization
1 Transmission buffer initialization
CHAPTER 29 USB FUNCTION
SIZE bits
Reserved
Reserved
Short Packet status bit
Received data status bit
Undefined
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