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CHAPTER 14 16-BIT I/O TIMER
14.3
16-bit Free-Running Timer
The 16-bit Free-Running Timer consists of a 16-bit up counter and a control status
register. The count values of this timer are used as the base time for the Output Compare
Units and Input Capture Units.
• Eight counter clock frequencies are available.
• An interrupt can be generated upon a counter value overflow.
• The counter value can be initialized upon a match with compare register 0 and
compare register 4, depending on the mode.
■ 16-bit Free-Running Timer block diagram
Bus
Note: The figure above is valid for all existing timers
Refer CHAPTER 1 for the connection of ICU and OCU
368
Figure 14.3-1 16-bit Free-Running Timer block diagram
Interrupt request
IVF
IVFE STOP MODE CLR CLK2 CLK1 CLK0
16-bit up counter
MB96300 Super Series Hardware Manual
TCCSLn
/1
Comparator 0
Clock
Count value output
CLKP1
Divider
FRCKn
TCCSHn:ECKE
TCCSHn:FSEL
/ 2
T15 to T00
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