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MB96300 Super Series Hardware Manual
●
Interrupt Vector Table
The interrupt vector table referenced during interrupt processing is assigned to addresses 256*TBR to
256*TBR+3FF
table. If the vector table should not be located at top of ROM memory, another TBR value has to be
configured.
Hardware interrupts, exceptions and software interrupts share the same vector table. Hence the interrupt
service routine can either be called by a hardware interrupt or by the corresponding software interrupt.
The three bytes of each start address of the interrupt service routines have to be written to the appropriate
interrupt vectors (VecAddr = 4*(255-INT#) + 256*TBR).
Table 3.2-2 Interrupt vector table
Interrupt / Vector number
INT 0
CALLV 0/1 (*1)
INT 1
CALLV 2/3 (*1)
INT 2
CALLV 4/5 (*1)
INT 3
CALLV 6/7 (*1)
INT 4
CALLV 8/9 (*1)
INT 5
CALLV 10/11 (*1)
INT 6
CALLV 12/13 (*1)
INT 7
CALLV 14 (*1)
INT 8
MODE Byte
INT 9
INT 10
INT 11
INT 12
INT 13
INT 14
INT 15
INT 16
in memory. The reset defaults are from FFFC00
H
Vector address
Index of level
register in ICR
TB+3FC
--
H
TB+3F8
--
H
TB+3F4
--
H
TB+3F0
--
H
TB+3EC
--
H
TB+3E8
--
H
TB+3E4
--
H
TB+3E0
--
H
TB+3DC
--
H
TB+3D8
--
H
TB+3D4
--
H
TB+3D0
--
H
TB+3CC
IL12
H
TB+3C8
IL13
H
TB+3C4
IL14
H
TB+3C0
IL15
H
TB+3BC
IL16
H
CHAPTER 3 INTERRUPTS
to FFFFFF
for the location of the vector
H
H
Hardware IRQ / Interrupt cause
--
--
--
--
--
--
--
--
Reset
INT9 instruction
Undefined Instruction Exception
NMI
Delayed Interrupt
RC Timer
MC Timer
SC Timer
<reserved for PLL Unlock>
93
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