Fujitsu MB96300 series Hardware Manual page 267

MB96300 Super Series Hardware Manual CHAPTER 9 STANDBY MODE AND VOLTAGE REGULATOR CONTROL
9.7.2 Setting the Voltage Regulator output voltage
The output voltage of the regulator can be programmed to adjust the core voltage
depending on the required performance or current consumption.
■ Voltage setting in High Power mode
The default output voltage of the regulator is 1.8V. This is the standard core voltage for the 0.18µm process
and suitable for most applications which do not require the maximum performance. See the Datasheet for the
maximum internal clock frequencies (CLKS1/2, CLKB and CLKP1/2) depending on the core voltage.
●
Changing the Core voltage to 1.9V
For applications which require the maximum performance, it is required to set the core voltage to 1.9V by
setting the VRCR:HPM bits to "11" before changing to the fast clock.
The regulator must be set to 1.9V before enabling the PLL with the high frequency.
For Flash devices, it is also necessary to set the FMCS:RD19V bit(s) to '1' before changing to the fast clock.
The order of the write access to the VRCR and FMCS register does not matter.
●
1.6V and 1.7V settings
These settings are not approved by Fujitsu.
■ Voltage setting in Low Power modes
The default output voltage of the regulator in Low Power mode A and B is 1.8V.
●
Changing the Core voltage in Low Power mode A
Changing the output voltage of the regulator in the Low Power mode A is not approved by Fujitsu.
●
Changing the Core voltage in Low Power mode B
For applications which require a small current consumption in Stop mode, it is possible to reduce the core
voltage to 1.2V by setting the VRCR:LPMB[2:0] bits to "000" before entering Stop mode. This reduces the
leakage current of the MCU.
See datasheet for absolute values of the Stop mode current at 1.2V and 1.8V core voltage.
259