Fujitsu MB96300 series Hardware Manual page 797

F2mc-16fx 16-bit
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30.4.7
Host Address Register (HADR)
The host address register (HADR) is a register used for an address field when a token is
sent.
■ Host Address Register (HADR)
Figure 30.4-8 Bit Configuration of Host address Register (HADR)
15
14
13
Resreved
HADR HADR HADR HADR HADR HADR HADR
-
R/W
R/W
X
: undefined value
R/W
: Readable and writable
: Initial value
Bit15
Bit14-8
12
11
10
9
R/W
R/W
R/W
R/W
Bit names
Reserved
HADR
Initial Value:
8
00000000
B
R/W
bit8 to 14
HADR
bit15
Reserved
0
Always write "0" to this bit
• Do not use
• Token address register.
• It is not initialized with the UDCC:RST bit.
• The UDCC:RST bit must be set to "0" to enable the HADR
register update
CHAPTER 30 USB Mini-host
Token address register
Reserved
Function
789

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