Fujitsu MB96300 series Hardware Manual page 922

APPENDIX
Table A-1 I/O map of MB96V300 (4/50)
Address
00005DH EXTINT1 - External Interrupt Interrupt request
Register
00005EH EXTINT1 - External Interrupt Level Select
00005FH EXTINT1 - External Interrupt Level Select
000060H RLT0 - Timer Control Status Register 0 Low
000061H RLT0 - Timer Control Status Register 0 High
000062H RLT0 - Reload Register Low - for writing
000062H RLT0 - Reload Register Low - for reading
000063H RLT0 - Reload Register High - for writing
000063H RLT0 - Reload Register High - for reading
000064H RLT1 - Timer Control Status Register Low
000065H RLT1 - Timer Control Status Register High
000066H RLT1 - Reload Register Low - for writing
000066H RLT1 - Reload Register Low - for reading
000067H RLT1 - Reload Register High - for writing
000067H RLT1 - Reload Register High - for reading
000068H RLT2 - Timer Control Status Register Low
000069H RLT2 - Timer Control Status Register High
00006AH RLT2 - Reload Register - for writing
00006AH RLT2 - Reload Register - for reading
00006BH RLT2 - Reload Register - for writing
00006BH RLT2 - Reload Register - for reading
00006CH RLT3 - Timer Control Status Register Low
00006DH RLT3 - Timer Control Status Register High
00006EH RLT3 - Reload Register - for writing
00006EH RLT3 - Reload Register - for reading
00006FH RLT3 - Reload Register - for writing
00006FH RLT3 - Reload Register - for reading
000070H RLT6 - Timer Control Status Register Low (dedic.
RLT for PPG) - for writing
914
Register
MB96300 Super Series Hardware Manual
Abbreviation Abbreviation
8-bit access 16-bit access
EIRR1
ELVRL1 ELVR1
ELVRH1
TMCSRL0 TMCSR0
TMCSRH0
TMRLR0
TMR0
TMCSRL1 TMCSR1
TMCSRH1
TMRLR1
TMR1
TMCSRL2 TMCSR2
TMCSRH2
TMRLR2
TMR2
TMCSRL3 TMCSR3
TMCSRH3
TMRLR3
TMR3
TMCSRL6 TMCSR6
Access
RW
RW
RW
RW
RW
W
R
W
R
RW
RW
W
R
W
R
RW
RW
W
R
W
R
RW
RW
W
R
W
R
RW