Fujitsu MB96300 series Hardware Manual page 653

F2mc-16fx 16-bit
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MB96300 Super Series Hardware Manual
bit11: Enable interrupt requests at 1-minute intervals
When the minute counter overflows, this flag is set to "1".
INTE1
0
No interrupt requests
1
Generate interrupt requests at 1-minute intervals.
bit10: 1-minute interrupt request flag
INT1
0
No interrupt requests
1
Generate interrupt requests at 1-minute
intervals.
bit9: Enable interrupt requests at 1-second intervals
When the 21 bit down counter is set to "0", this flag is set to "1".
INTE0
0
No interrupt requests
1
Generate interrupt requests at 1-second intervals.
bit8: 1-second interrupt request flag
INT0
0
No interrupt requests
1
Generate interrupt requests at 1-second
intervals.
bit7-5: Reserved
Always write "0". The read value is undefined. Read-modify-write is not affected.
bit4: Undefined
Always write "0". The read value is undefined. Read-modify-write is not affected.
bit3: Operation status
RUN
0
The Real-time Clock module is inactive.
1
The Real-time Clock module is active.
bit2: Update
Before writing "1" to the update bit (UPDT), the hour/minute/second registers must be set to the values
with which to update the hour/minute/second counters. The hour/minute/second registers are updated on
reloading to the 21 bit down counter.
UPDT
0
The update has been completed. (Writing "0" does not affect the operation.)
1
Update the hour/minute/second counters with the values of the hour/minute/second registers,
respectively.
Operation
Operation
Read
Clear the flag.
Writing does not affect the operation.
Operation
Status
Read
Clear the flag.
Writing does not affect the operation.
Operation status
Status/Operation
CHAPTER 24 REAL TIME CLOCK
Write
Write
645

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