Lcd Controller/Driver Display Ram - Fujitsu MB96300 series Hardware Manual

MB96300 Super Series Hardware Manual
26.4

LCD Controller/Driver Display RAM

The display RAM is a 36 x 8 bit display memory area used to generate a segment output
signal.
■ Memory area (VRAM) for setting display data
• VRAM0 (SEG1, SEG0): (Access: Byte)
• VRAM(x/2 - 1) (SEGx-1, SEGx-2): (Access: Byte)
Notes:
- x: Maximum number of segments
7 6
DH3 DH2
X X
R/W R/W
Notes:
- Regardless of the operation of LCD Controller/Driver, RAM can be read and written any time.
■ Correspondence between VRAM and Common/Segment Pins
Figure 26.4-1 Correspondence between VRAM and Common/Segment Pins
VRAM0
VRAM35
.
.
5 4 3
DH1 DH0 DL3
X X X
R/W R/W R/W
DL3
DH3
DL3
DH3
CHAPTER 26 LCD CONTROLLER/DRIVER
2 1
DL2 DL1
X X
R/W R/W
SEG0
DL2 DL1
DL0
DH2 DH1 SEG1
DH0
SEG70
DL2
DL1 DL0
SEG71
DH2
DH1 DH0
RAM area and common pins used
in 1/2 duty cycle output mode
RAM area and common pins used
in 1/3 duty cycle output mode
RAM area and common pins used
in 1/4 duty cycle output mode
0 bit
DL0
X Initial
value
R/W Attribute
681