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CHAPTER 21 400 kHz I2C INTERFACE
Figure 21.2-5 Diagram of timing at which an interrupt upon detection of "AL bit = 1" does not occur
SCL pin
SDA pin
EN bit
MSS bit
AL bit
BB bit
INT bit
If a symptom as described above can occur, follow the procedure below for software processing.
1. Execute the instruction that generates a start condition (set the MSS bit to 1).
2. Use, for example, the timer function to wait for the time for three - bit data transmission at the I
frequency set in the ICCR register.*
Example: Time for three-bit data transmission at an I
× 3 = 30
3. Check the AL and BB bits in the IBSR register and, if the AL and BB bits are 1 and 0, respectively, set
the EN bit in the ICCR register to 0 to initialize I
processing.
A sample flow is given below.
556
INT bit interruption is not generated
Start Condition
in 9th clock.
SLAVE ADDRESS
MB96300 Super Series Hardware Manual
Stop Condition
ACK
DAT
ACK
2
C transfer frequency of 100 kHz = (1 / (100 × 10
2
C. When the AL and BB bits are not so, perform normal
0
0
2
C transfer
3
))
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