Table of Contents
Advertisement
MB96300 Super Series Hardware Manual
7.2.2
Clock Modulation Parameter Register (CMPR)
The Clock Modulation Parameter Register (CMPR) determines the modulation degree.
■ Clock Modulation parameter register
• The modulation parameter determines the degree of modulation and the maximal and minimal occurring
frequencies in the modulated clock. Please refer to the application note for a description of an approach to
select the optimal setting.
• Each set of possible modulation parameters refers to a particular PLL frequency. The PLL frequency and
the selected parameter must match. Please refer to the following table of possible settings.
Note:
The modulation parameter must be changed only when the modulator is disabled and the RUN flag is 0
(MODEN=0, MODRUN=0).
■ Clock Modulation parameter register contents
Table 7.2-3 Function of each bit of the clock modulation parameter register (CMPR)
Bit name
bit 15, 14
Undefined
bit 13 to 0
MP13 to 0:
Modulation
Parameter bits
Figure 7.2-3 Clock Modulation parameter register
CMPRL: Clock Modulator Parameter Register (lower)
7
6
5
Address:
00041A
H
MP7
MP6
MP5
R/W R/W R/W R/W R/W
Initial value
1
1
1
CMPRH: Clock Modulator Parameter Register (upper)
15
14
13
Address:
00041B
Res.
Res.
MB13
MP12 MP11
H
-
-
R/W R/W R/W
Initial value
X
X
0
X
: Undefined value
R/W
: Readable and writable
Depending on the PLL frequency the following modulation parameter settings are
possible. The corresponding CMPR register value is stated in the most right column.
4
3
2
1
0
MB4
MP3
MP2
MP1
MP0
R/W R/W R/W
1
1
1
0
1
12
11
10
9
8
MP10
MP9
MP8
R/W R/W R/W
0
0
0
1
0
Function
CHAPTER 7 CLOCK MODULATOR
185
Advertisement
Table of Contents
