Altera cyclone V Technical Reference page 2495

Hard processor system

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dvbuspulse Fields

Thresholding is not supported in Slave mode and so this register must not be programmed in Slave mode.

for threshold support, the AHB must be run at 60 MHz or higher.

Module Instance

Important: To prevent indeterminate system behavior, reserved areas of memory must not be accessed by

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Specifies the VBUS pulsing time during SRP. This

value equals: VBUS pulsing time in PHY clocks/1,024

The value you use depends whether the PHY is

operating at 30MHz (16-bit data width) or 60 MHz

(8-bit data width).

software or hardware. Any area of the memory map that is not explicitly defined as a register

space or accessible memory is considered reserved.

Base Address

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