Altera cyclone V Technical Reference page 2111

Hard processor system

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USB 2.0 OTG Controller

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USB OTG Controller Module Registers Address Map

Host Channel 2 Interrupt Mask

Host Channel 2 Transfer Size

Host Channel 2 DMA Address

Host Channel 2 DMA Buffer

Address Register

Host Channel 3 Characteristics

Host Channel 3 Split Control

Host Channel 3 Interrupt Register

Host Channel 3 Interrupt Mask

Host Channel 3 Transfer Size

Host Channel 3 DMA Address

Host Channel 3 DMA Buffer

Address Register

Host Channel 4 Characteristics

Host Channel 4 Split Control

Host Channel 4 Interrupt Register

Host Channel 4 Interrupt Mask

Host Channel 4 Transfer Size

Host Channel 4 DMA Address

Host Channel 4 DMA Buffer

Address Register

Host Channel 5 Characteristics

Host Channel 5 Split Control

Host Channel 5 Interrupt Register

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