Altera cyclone V Technical Reference page 2337

Hard processor system
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cv_5v4
2016.10.28
hctsiz7 Fields
Bit
31
dopng
30:29
pid
28:19
pktcnt
18:0
xfersize
hcdma7
This register is used by the OTG host in the internal DMA mode to maintain the current buffer pointer for
IN/OUT transactions. The starting DMA address must be DWORD-aligned.
USB 2.0 OTG Controller
Send Feedback
Name
This bit is used only for OUT transfers.Setting this
field to 1 directs the host to do PING protocol. Do not
Set this bit for IN transfers. If this bit is set for IN
transfers it disables the channel.
Value
0x0
0x1
The application programs this field with the type of
PID to use forthe initial transaction. The host
maintains this field for the rest of the transfer.
Value
0x0
0x1
0x2
0x3
This field is programmed by the application with the
expected number of packets to be transmitted (OUT)
or received (IN). The host decrements this count on
every successful transmission or reception of an
OUT/IN packet. Once this count reaches zero, the
application is interrupted to indicate normal
completion. The width of this counter is specified as
10 bits.
for an OUT, this field is the number of data bytes the
host sends during the transfer. for an IN, this field is
the buffer size that the application has Reserved for
the transfer. The application is expected to program
this field as an integer multiple of the maximum
packet size for IN transactions (periodic and non-
periodic)​.The width of this counter is specified as 19
bits.
Description
Description
No ping protocol
Ping protocol
Description
DATA0
DATA2
DATA1
MDATA (non-control)/SETUP (control)
18-247
hcdma7
Access
Reset
RW
0x0
RW
0x0
RW
0x0
RW
0x0
Altera Corporation

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