Altera cyclone V Technical Reference page 2171

cv_5v4
2016.10.28
gnptxfsiz Fields
Bit
29:16
nptxfdep
13:0
nptxfstaddr
gnptxsts
In Device mode, this register is valid only in Shared FIFO operation. It contains the free space information
for the Non-periodic TxFIFO and the Nonperiodic Transmit RequestQueue
Module Instance
usb0
usb1
Offset:
0x2C
Access:
RO
Important: To prevent indeterminate system behavior, reserved areas of memory must not be accessed by
31 30
Reserved
15 14
USB 2.0 OTG Controller
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Name
Mode: Host only. for host mode, this field is always
valid. The application can write a new value in this
field. Programmed values must not exceed 8192
Mode: Host only. for host mode, this field is always
valid.This field contains the memory start address for
Non-periodic Transmit FIFO RAM. This field is set
from 16-8192 32 bit words. The application can write
a new value in this field. Programmed values must not
exceed 8192.
0xFFB00000
0xFFB40000
software or hardware. Any area of the memory map that is not explicitly defined as a register
space or accessible memory is considered reserved.
29 28 27 26
nptxqtop
RO 0x0
13 12 11 10
Description
Base Address
Bit Fields
25 24 23 22
9 8 7 6
nptxfspcavail
RO 0x400
gnptxsts
Access
Register Address
0xFFB0002C
0xFFB4002C
21 20 19 18
nptxqspcavail
RO 0x8
5 4 3 2
18-81
Reset
RW 0x2000
RW 0x2000
17 16
1 0
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