Altera cyclone V Technical Reference page 2114
Hard processor system
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Also See for cyclone V:
- Device handbook (1077 pages) ,
- User manual (136 pages) ,
- Reference manual (66 pages)
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18-24
USB OTG Controller Module Registers Address Map
Register
hcint11
on page 18-
296
hcintmsk11
on page
18-300
hctsiz11
on page 18-
302
hcdma11
on page 18-
303
hcdmab11
on page 18-
305
hcchar12
on page 18-
305
hcsplt12
on page 18-
308
hcint12
on page 18-
310
hcintmsk12
on page
18-314
hctsiz12
on page 18-
316
hcdma12
on page 18-
317
hcdmab12
on page 18-
319
hcchar13
on page 18-
319
hcsplt13
on page 18-
322
hcint13
on page 18-
324
hcintmsk13
on page
18-328
hctsiz13
on page 18-
330
hcdma13
on page 18-
331
hcdmab13
on page 18-
333
hcchar14
on page 18-
333
Altera Corporation
Offset
Width Acces
s
0x668
32
RO
0x66C
32
RW
0x670
32
RW
0x674
32
RW
0x678
32
RW
0x680
32
RW
0x684
32
RW
0x688
32
RO
0x68C
32
RW
0x690
32
RW
0x694
32
RW
0x698
32
RW
0x6A0
32
RW
0x6A4
32
RW
0x6A8
32
RO
0x6AC
32
RW
0x6B0
32
RW
0x6B4
32
RW
0x6B8
32
RW
0x6C0
32
RW
Reset Value
Host Channel 11 Interrupt
0x0
Register
Channel 11 Interrupt Mask
0x0
Register
Host Channel 11 Transfer Size
0x0
Register
Host Channel 11 DMA Address
0x0
Register
Host Channel 11 DMA Buffer
0x0
Address Register
Host Channel 12 Characteristics
0x0
Register
Host Channel 12 Split Control
0x0
Register
Host Channel 12 Interrupt
0x0
Register
Host Channel 12 Interrupt Mask
0x0
Register
Host Channel 12 Transfer Size
0x0
Register
Host Channel 12 DMA Address
0x0
Register
Host Channel 12 DMA Buffer
0x0
Address Register
Host Channel 13 Characteristics
0x0
Register
Host Channel 13 Split Control
0x0
Register
Host Channel 13 Interrupt
0x0
Register
Host Channel 13 Interrupt Mask
0x0
Registe
Host Channel 13 Transfer Size
0x0
Register
Host Channel 13 DMA Address
0x0
Register
Host Channel 13 DMA Buffer
0x0
Address Register
Host Channel 14 Characteristics
0x0
Register
cv_5v4
2016.10.28
Description
USB 2.0 OTG Controller
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