Altera cyclone V Technical Reference page 2223

cv_5v4
2016.10.28
haintmsk Fields
Bit
15:0
haintmsk
hflbaddr
This Register is valid only for Host mode Scatter-Gather DMA. Starting address of the Frame list. This
register is used only for Isochronous and Interrupt Channels.
Module Instance
usb0
usb1
Offset:
0x41C
Access:
RW
31 30
15 14
hflbaddr Fields
Bit
31:0
hflbaddr
USB 2.0 OTG Controller
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Name
One bit per channel: Bit 0 for channel 0, bit 15 for
channel 15
Value
0x0
0x1
0xFFB00000
0xFFB40000
29 28 27 26
13 12 11 10
Name
This Register is valid only for Host mode Scatter-
Gather DMA mode. Starting address of the Frame
list. This register is used only for Isochronous and
Interrupt Channels.
Description
Description
Mask interrupt
Unmask interrupt
Base Address
Bit Fields
25 24 23 22
hflbaddr
RW 0x0
9 8 7 6
hflbaddr
RW 0x0
Description
hflbaddr
Access
Register Address
0xFFB0041C
0xFFB4041C
21 20 19 18
5 4 3 2
Access
18-133
Reset
RW 0x0
17 16
1 0
Reset
RW 0x0
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