Altera cyclone V Technical Reference page 2115
Hard processor system
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Also See for cyclone V:
- Device handbook (1077 pages) ,
- User manual (136 pages) ,
- Reference manual (66 pages)
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cv_5v4
2016.10.28
Register
hcsplt14
on page 18-
336
hcint14
on page 18-
338
hcintmsk14
on page
18-342
hctsiz14
on page 18-
344
hcdma14
on page 18-
345
hcdmab14
on page 18-
347
hcchar15
on page 18-
347
hcsplt15
on page 18-
350
hcint15
on page 18-
352
hcintmsk15
on page
18-356
hctsiz15
on page 18-
358
hcdma15
on page 18-
359
hcdmab15
on page 18-
361
Device Mode Registers
Register
dcfg
on page 18-377
dctl
on page 18-381
dsts
on page 18-386
diepmsk
on page 18-
388
doepmsk
on page 18-
390
USB 2.0 OTG Controller
Send Feedback
USB OTG Controller Module Registers Address Map
Offset
Width Acces
s
0x6C4
32
RW
0x6C8
32
RO
0x6CC
32
RW
0x6D0
32
RW
0x6D4
32
RW
0x6D8
32
RW
0x6E0
32
RW
0x6E4
32
RW
0x6E8
32
RO
0x6EC
32
RW
0x6F0
32
RW
0x6F4
32
RW
0x6F8
32
RW
Offset
Width Acces
s
0x800
32
RW
0x804
32
RW
0x808
32
RO
0x810
32
RW
0x814
32
RW
Reset Value
Host Channel 14 Split Control
0x0
Register
Host Channel 14 Interrupt
0x0
Register
Host Channel 14 Interrupt Mask
0x0
Register
Host Channel 14 Transfer Size
0x0
Register
Host Channel 14 DMA Address
0x0
Register
Host Channel 14 DMA Buffer
0x0
Address Register
Host Channel 15 Characteristics
0x0
Register
Host Channel 15 Split Control
0x0
Register
Host Channel 15 Interrupt
0x0
Register
Host Channel 15 Interrupt Mask
0x0
Register
Host Channel 15 Transfer Size
0x0
Register
Host Channel 15 DMA Address
0x0
Register
Host Channel 15 DMA Buffer
0x0
Address Register
Reset Value
Device Configuration Register
0x8000000
Device Control Register
0x0
Device Status Register
0x2
Device IN Endpoint Common
0x0
Interrupt Mask Register
Device OUT Endpoint Common
0x0
Interrupt Mask Register
18-25
Description
Description
Altera Corporation
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