Altera cyclone V Technical Reference page 2157

cv_5v4
2016.10.28
Bit
20
incompisoin
19
oepint
18
iepint
USB 2.0 OTG Controller
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Name
Mode: Device only. The core sets this interrupt to
indicate that there is at least isochronous IN endpoint
on which the transfer is not completed in the current
microframe. This interrupt is asserted along with the
End of Periodic Frame Interrupt (EOPF) bit in this
register. This interrupt is not asserted in Scatter/
Gather DMA mode.
Value
0x0
0x1
Mode: Device only. The core sets this bit to indicate
that an interrupt is pending on one of the OUT
endpoints of the core (in Device mode)​. The applica‐
tion must read the Device All Endpoints Interrupt
(DAINT) register to determine the exact number of
the OUT endpoint on which the interrupt occurred,
and Then read the corresponding Device OUT
Endpoint-n Interrupt (DOEPINTn) register to
determine the exact cause of the interrupt. The
application must clear the appropriate status bit in the
corresponding DOEPINTn register to clear this bit.
Value
0x0
0x1
Mode: Device only. The core sets this bit to indicate
that an interrupt is pending on one of the IN
endpoints of the core (in Device mode)​. The applica‐
tion must read the Device All Endpoints Interrupt
(DAINT) register to determine the exact number of
the IN endpoint on Device IN Endpoint-n Interrupt
(DIEPINTn) register to determine the exact cause of
the interrupt. The application must clear the
appropriate status bit in the corresponding DIEPINTn
register to clear this bit.
Value
0x0
0x1
Description
Description
Not active
Incomplete Isochronous IN Transfer
Description
Not active
OUT Endpoints Interrupt
Description
Not active
IN Endpoints Interrupt
18-67
gintsts
Access Reset
RO 0x0
RO 0x0
RO 0x0
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