Altera cyclone V Technical Reference page 2305

cv_5v4
2016.10.28
Bit
5
ack
4
nak
3
stall
2
ahberr
USB 2.0 OTG Controller
Send Feedback
Name
In Scatter/Gather DMA mode, the interrupt due to
this bit is masked in the core. This bit can be set only
by the core and the application should write 1 to clear
it.
Value
0x0
0x1
In Scatter/Gather DMA mode, the interrupt due to
this bit is masked in the core.This bit can be set only
by the core and the application should write 1 to clear
it.
Value
0x0
0x1
In Scatter/Gather DMA mode, the interrupt due to
this bit is masked in the core. This bit can be set only
by the core and the application should write 1 to clear
it.
Value
0x0
0x1
This is generated only in Internal DMA mode when
there is an AHB error during AHB read/​write. The
application can read the corresponding channel's
DMA address register to get the error address.
Value
0x0
0x1
Description
Description
No ACK Response Received Transmitted
Interrupt
ACK Response Received Transmitted
Interrup
Description
No NAK Response Received Interrupt
NAK Response Received Interrupt
Description
No Stall Interrupt
Stall Interrupt
Description
No AHB error
AHB error during AHB read/write
18-215
hcint5
Access Reset
RO 0x0
RO 0x0
RO 0x0
RO 0x0
Altera Corporation