Altera cyclone V Technical Reference page 2184

18-94
ghwcfg4
Bit
8
i2cintsel
7
otgen
6:4
pktsizewidth
3:0
xfersizewidth
ghwcfg4
This register contains the configuration options.
Altera Corporation
Name
I2C Interface not used.
Value
0x0
HNP and SRP Capable OTG (Device and Host)
Value
0x1
Value
0x0
0x1
0x2
0x3
0x4
0x5
0x6
Width variable from 11 to 19 bits.
Value
0x0
0x1
0x2
0x3
0x4
0x5
0x6
0x7
0x8
Description
Description
I2C Interface
Description
OTG Capable
Description
Width of Packet Size Counter 4
Width of Packet Size Counter 5
Width of Packet Size Counter 6
Width of Packet Size Counter 7
Width of Packet Size Counter 8
Width of Packet Size Counter 9
Width of Packet Size Counter 10
Description
Width of Transfer Size Counter 11 bits
Width of Transfer Size Counter 12 bits
Width of Transfer Size Counter 13 bits
Width of Transfer Size Counter 14 bits
Width of Transfer Size Counter 15 bits
Width of Transfer Size Counter 16 bits
Width of Transfer Size Counter 17 bits
Width of Transfer Size Counter 18 bits
Width of Transfer Size Counter 19 bits
cv_5v4
2016.10.28
Access Reset
RO 0x0
RO 0x1
RO 0x6
RO 0x8
USB 2.0 OTG Controller
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