Altera cyclone V Technical Reference page 2468

18-378
dcfg
31 30
resvalid
15 14
Reserved endev
outna
dcfg Fields
Bit
31:26
resvalid
25:24
perschintvl
Altera Corporation
29 28 27 26
RW 0x2
13 12 11 10
perfrint
RW 0x0
k
RW
0x0
Name
This field is effective only when
DCFG.Ena32KHzSusp is set. It will control the
resume period when the core resumes from suspend.
The core counts for ResValid number of clock cycles
to detect a valid resume when this is set
PerSchIntvl must be programmed only for Scatter/
Gather DMAmode. Description: This field specifies
the amount of time the Internal DMA engine must
allocate for fetching periodic IN endpoint data. Based
on the number of periodic endpoints, this value must
be specified as 25,50 or 75% of (micro)frame. When
any periodic endpoints are active, the internal DMA
engine allocates the specified amount of time in
fetching periodic IN endpoint data . When no
periodic endpoints are active, Then the internal DMA
engine services non-periodic endpoints, ignoring this
field. After the specified time within a (micro)frame,
the DMA switches to fetching for non-periodic
endpoints. 2'b00: 25% of (micro)frame. 2'b01: 50% of
(micro)frame. 2'b10: 75% of (micro)frame. 2'b11:
Reserved.Reset: 2'b00Access: read-write
Value
0x0
0x1
0x2
0x3
Bit Fields
25 24 23 22
perschintvl descd
ma
RW 0x0
RW
0x0
9 8 7 6
devaddr
RW 0x0
Description
Description
25% of (micro)frame
50% of (micro)frame
75% of (micro)frame
Reserved
21 20 19 18
Reserved
5 4 3 2
ena32 nzsts
khzsu ouths
sp hk
RW RW
0x0 0x0
Access
USB 2.0 OTG Controller
cv_5v4
2016.10.28
17 16
1 0
devspd
RW 0x0
Reset
RW 0x2
RW 0x0
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