Altera cyclone V Technical Reference page 2431

Hard processor system
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cv_5v4
2016.10.28
Bit
6
nyet
5
ack
4
nak
3
stall
USB 2.0 OTG Controller
Send Feedback
Name
In Scatter/Gather DMA mode, the interrupt due to
this bit is masked in the core.This bit can be set only
by the core and the application should write 1 to clear
it.
Value
0x0
0x1
In Scatter/Gather DMA mode, the interrupt due to
this bit is masked in the core. This bit can be set only
by the core and the application should write 1 to clear
it.
Value
0x0
0x1
In Scatter/Gather DMA mode, the interrupt due to
this bit is masked in the core.This bit can be set only
by the core and the application should write 1 to clear
it.
Value
0x0
0x1
In Scatter/Gather DMA mode, the interrupt due to
this bit is masked in the core. This bit can be set only
by the core and the application should write 1 to clear
it.
Value
0x0
0x1
Description
Description
No NYET Response Received Interrupt
NYET Response Received Interrupt
Description
No ACK Response Received Transmitted
Interrupt
ACK Response Received Transmitted
Interrup
Description
No NAK Response Received Interrupt
NAK Response Received Interrupt
Description
No Stall Interrupt
Stall Interrupt
18-341
hcint14
Access
Reset
RO
0x0
RO
0x0
RO
0x0
RO
0x0
Altera Corporation

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