Altera cyclone V Technical Reference page 2276

18-186
hcint3
31 30
15 14
Reserved desc_
lst_
rolli
hcint3 Fields
Bit
13
desc_lst_rollintr
12
xcs_xact_err
11
bnaintr
Altera Corporation
29 28 27 26
13 12 11 10
xcs_ bnain datat
xact_ tr glerr
err
RO RO
ntr
RO 0x0 0x0
RO 0x0
0x0
Name
Descriptor rollover interrupt (DESC_LST_ROLLIntr)
This bit is valid only when Scatter/Gather DMA mode
is enabled. The core sets this bit when the
corresponding channel's descriptor list rolls over. for
non Scatter/Gather DMA mode, this bit is reserved.
Value
0x0
0x1
This bit is valid only when Scatter/Gather DMA mode
is enabled. The core sets this bit when 3 consecutive
transaction errors occurred on the USB bus. XCS_
XACT_ERR will not be generated for Isochronous
channels.for non Scatter/Gather DMA mode, this bit
is reserved.
Value
0x0
0x1
This bit is valid only when Scatter/Gather DMA mode
is enabled. The core generates this interrupt when the
descriptor accessed is not ready for the Core to
process. BNA will not be generated for Isochronous
channels. for non Scatter/Gather DMA mode, this bit
is reserved.
0x0
0x1
Bit Fields
25 24 23 22
Reserved
9 8 7 6
frmov bbler xacte nyet
run r rr
RO
RO RO RO 0x0
0x0 0x0 0x0
Description
Description
No Descriptor rollover interrupt
Descriptor rollover interrupt
Description
No Excessive Transaction Error
Excessive Transaction Error
Value Description
No BNA Interrupt
BNA Interrupt
21 20 19 18
5 4 3 2
ack nak stall ahber
r
RO RO RO
0x0 0x0 0x0 RO
0x0
Access
USB 2.0 OTG Controller
cv_5v4
2016.10.28
17 16
1 0
chhlt xfercomp
d l
RO RO 0x0
0x0
Reset
RO 0x0
RO 0x0
RO 0x0
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