Altera cyclone V Technical Reference page 2465

cv_5v4
2016.10.28
doepdmab9
DMA Buffer Address.
doepctl10
Out Endpoint 10.
doepint10
This register indicates the status of an endpoint with respect to USB- and AHB-related events. The
application must read this register when the OUT Endpoints Interrupt bit or IN Endpoints Interrupt bit of
the Core Interrupt register (GINTSTS.OEPInt or GINTSTS.IEPInt, respectively) is set. Before the
application can read this register, it must first read the Device All Endpoints Interrupt (DAINT) register to
get the exact endpoint number for the Device Endpoint-n Interrupt register. The application must clear the
appropriate bit in this register to clear the corresponding bits in the DAINT and GINTSTS registers.
doeptsiz10
The application must modify this register before enabling the endpoint. Once the endpoint is enabled
using Endpoint Enable bit of the Device Endpoint-n Control registers (DIEPCTLn.EPEna/
DOEPCTLn.EPEna), the core modifies this register. The application can only read this register once the
core has cleared the Endpoint Enable bit.
doepdma10
DMA OUT Address.
doepdmab10
DMA Buffer Address.
doepctl11
Out Endpoint 11.
doepint11
This register indicates the status of an endpoint with respect to USB- and AHB-related events. The
application must read this register when the OUT Endpoints Interrupt bit or IN Endpoints Interrupt bit of
the Core Interrupt register (GINTSTS.OEPInt or GINTSTS.IEPInt, respectively) is set. Before the
application can read this register, it must first read the Device All Endpoints Interrupt (DAINT) register to
get the exact endpoint number for the Device Endpoint-n Interrupt register. The application must clear the
appropriate bit in this register to clear the corresponding bits in the DAINT and GINTSTS registers.
doeptsiz11
The application must modify this register before enabling the endpoint. Once the endpoint is enabled
using Endpoint Enable bit of the Device Endpoint-n Control registers (DIEPCTLn.EPEna/
DOEPCTLn.EPEna), the core modifies this register. The application can only read this register once the
core has cleared the Endpoint Enable bit.
doepdma11
DMA OUT Address.
doepdmab11
DMA Buffer Address.
doepctl12
Out Endpoint 12.
USB 2.0 OTG Controller
Send Feedback
on page 18-758
on page 18-759
on page 18-765
on page 18-769
on page 18-771
on page 18-771
on page 18-772
on page 18-778
on page 18-782
on page 18-784
on page 18-784
on page 18-785
Device Mode Registers Register Descriptions
18-375
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